1. Field of the Invention
The present invention relates to a semiconductor integrated circuit test, particularly to a semiconductor integrated circuit that is configured to execute detection of glitch noise, and a testing method of the same.
2. Description of the Related Art
Because interval distance between wiring decreases in correlation with miniaturization of semiconductor integrated circuits, influences of crosstalk noise, which is caused by factors such as coupling capacitance in between wiring, on semiconductor integrated circuit properties, becomes great. Because of this, occurrences of chips having bad properties, which are caused by crosstalk noise, are problematic.
The term “crosstalk noise” refers to an occurrence of a change in signal level in a wire that is brought about by an influential change in signal level of an adjacent wire. Also related to crosstalk noise are glitch noise, and signal distortion.
“Glitch noise” is when wiring that influences adjacent wiring with noise, (referred to as “aggressor wiring” hereinafter) undergoes a signal change, generating a pulse in adjacent wiring having a fixed signal level, such a pulse corresponding to the time at which the signal level of the aggressor wiring has changed. Wiring which takes on crosstalk noise influence is termed “victim wiring”. In a case in which the signal level of victim wiring is low, occurrences of glitch noise, which cause the low signal level to become high, are problematic. In a case in which the signal level of victim wiring is high, occurrences of glitch noise, which cause the high signal level to become low, are problematic.
On the other hand, the term “signal distortion” refers to a phenomenon in which in a case in which the signal level of the aggressor wiring and the victim wiring change at roughly the same time, and according to the influential change in the signal level of the aggressor wiring, the time it takes for the signal level of the victim wiring to change varies compared to a case having no influential crosstalk noise.
Crosstalk noise occurs easily in spots in which wiring adjacent one another are established parallel over long stretches. Because of this, it is possible to extract at-risk locations to an extent, during the stage of designing the schematic of semiconductor integrated circuits. By changing wiring arrangements of at-risk locations, it is possible to cut risks of crosstalk noise occurrence.
However, there are cases in which at-risk locations, which could not be extracted during designing of a wiring schematic, remain after changing target wiring arrangements. Even if not extracted as at-risk locations, there also exist cases harboring an inconvenience of crosstalk noise influence within manufactured semiconductor integrated circuits, due to fluctuations that occur during manufacturing. Because of this, it is essential to provide a test capable of detecting occurrences of crosstalk noise in a manufactured semiconductor integrated circuit.
Detection for whether or not glitch noise is occurring in victim wiring is carried out by importing signals that propagate through victim wiring, into a flip-flop of a scan testing circuit. With the above method, the time period throughout activation of the clock signal that controls the scan testing circuit is a timing window for importing data into the flip-flop. And the occurring glitch noise is detected in the timing window of the flip-flop, into which signals that propagate through victim wiring is input. However, in scan testing circuit, in order to improve the controllability of the clock signal used in a scan testing circuit, bypass circuits may be inserted into the circuitry that propagates clock signals. In such a case, clock signal timing of normal operation of a semiconductor integrated circuit, and scan test operation, differ. Because of this, glitch noise occurring during normal circuit operation is generated outside of the flip-flop timing window in the operation of the scan test, leading to cases in which detection is not possible.
There is also a method in which signals that are capable of generating glitch noise are taken in order to facilitate observation outside of a semiconductor integrated circuit, and glitch noise is detected by an outside apparatus. However, the number of possible target aggressor wirings can become limited with this method.